.title CAMAC Subroutins for Kinetic 2922-3922 V01 .ident /1-01/ ; ; VAX/VMS CAMAC subroutines for Kinetic 2922-3922 Crate Controllers ; ; This is a subroutine packege which is compatible to the IEEE Standard ; subroutins for CAMAC (IEEE Std 758-1979). ; These subroutines can be called from VAX FORTRAN. ; ; Auther: ; Takashi Ichihara, ; RIKEN, Hirosawa, Wako, Saitama, 351-01, Japan ; ; Date : ; V-01 21 September 1987 ; ; Module name ; ; * CCMAP This subroutin should be called first ; CCINIT(b) Initialize 3922 interface boad to power up state ; CDREG(ext,b,c,n,a) Declare CAMAC register ; CFSA(f,ext,int,q) Perform single CAMAC Action (24 bit transfer) ; * CCNAF(c,n,a,f,int,q)Perform single CAMAC Action (CDREG+CFSA) ; CCCZ(ext) Generate Dataway Initialize ; CCCC(ext) Generate Crate Clear ; CCCI(ext,l) Set or Clear Datawy Inhibit ; CTCI(ext,l) Test Dataway Inhibit ; CCCD(ext,l) Enable or Disable Crate Demmand -- this is dummy rou. ; CTCD(ext,l) Test Crate Demand Enabled -- this is dummy rou. ; CDLAM(lam,b,c,n,m,i)Declare LAM ; CCLM(lam,l) Enable or Disable Lam ; CCLC(lam) Clear LAM -- this is dummy rou. ; CTLM(lam) Test LAM -- this is dummt rou. ; ; (NB : * is not IEEE standard subroutine) ; ; ; ; External modules needed in linkage time ; setiomap - create and map physical io page into vertual page ; write - write character to the current terminal ; ; .psect C2922_main ; ; System hardware dependent parameters ; cc_iopage=^x100000 ; cc csr physical page frame number cc_vector=^o400 ; cc vector cc_base =^o640 ; cc csr base (760640) ; ; System hardware independent parameters ; cc_csr = 0 ; Control/Status register cc_ers = cc_csr+^o2 ; Error/Status register cc_mcr = cc_csr+^o4 ; Mode Control register cc_ccr = cc_csr+^o6 ; CAMAC Crate register cc_nafr = cc_csr+^o10 ; CAMAC Command register cc_dlr = cc_csr+^o12 ; Data Low register cc_dhr = cc_csr+^o14 ; Data High register cc_srr = cc_csr+^o16 ; Service Request register cc_wcr = cc_csr+^o20 ; Word Count resister cc_mar = cc_csr+^o22 ; Memory Address register cc_emar = cc_csr+^o24 ; Extended memory address register cc_go = ^x1 ; go cc_rst = ^x1000 ; reset cc_sie = ^x100 ; Service (LAM) Interupt inable F = ^x1 ; Function A = ^x20 ; Subaddress N = ^x200 ; station number p1 = 4 p2 = 8 p3 = 12 p4 = 16 p5 = 20 p6 = 24 cr = ^x0d ; caridge return lf = ^x0a ; line feed bell = ^x07 ; bell code .sbttl CCMAP Mappind device register ; ; MAP CSA to virtual memory ; ; ; Calling sequence ; ; called with calls or callg ; ; ; Return code ; ; r0 - return code for chrmpsc system calls ; r1 - virtual io base address ; ccmap:: .word ^M ; pushl #cc_iopage ;cc io page number pushl #1 ;page number pushal iobase_va ;push io base vertual address calls #3,setiomap ;create and map io page frame movl r1,iobase_ret ;io page virtual address addl3 r1,#cc_base,r2 ;cc resister base address movl r2,cbase ;save base address ret .sbttl CCINIT Initialize the interface ; ; Initialize the interface to the power-up state ; ; ; Calling sequence ; ; called with calls or callg ; ; Input/Output parametes (all interger*4) ; ; p1 b (branch number) ; ; Return code ; ; r0 - return code for chrmpsc system calls ; r1 - virtual io base address ; ccinit:: .word ^M ; movl cbase,r2 ; restore csa bisw #cc_rst,cc_csr(r2) ; set reset bit of csr ret .sbttl CDREG Declare CAMAC Register ; ; Declar CAMAC register ; ; ; Calling sequence ; ; called with calls or callg ; ; Input/Output parametes (all interger*4) ; ; p1 ext (external address) ; p2 b (branch number) - This is not used in this subroutine ; p3 c (crate number) ; p4 n (station number) ; p5 a (subaddress) ; ; Data structure of ext ; low 2 byte = Crate number (CCR format) ; high 2 byte = F + 32*A + 512*N (NAFR format) ; cdreg:: .word ^M ; ashl #25,@p4(ap),r2 ; station number ashl #21,@p5(ap),r3 ; sub address addl r3,r2 ; R2 addl3 r2,@p3(ap),@p1(ap) ; store code to ext. ret .sbttl CFSA Perform Single CAMAC Action ; ; Declar CAMAC register ; ; ; Calling sequence ; ; called with calls or callg ; ; Input/Output parameters (all interger*4) ; ; p1 f (function code) ; p2 ext (external address) ; p3 int (CAMAC DATA word) ; p4 q (Q responce) ; ; cfsa:: .word ^M ; movl cbase,r2 ; restore CAMAC csr address movw @p2(ap),cc_ccr(r2) ; load Crate address to CCR movl @p2(ap),r3 ; load C N A ashl #-16,r3,r3 ; Extract N + A movl @p1(ap),r4 ; load F addw3 r3,r4,cc_nafr(r2) ; load N + A + F to NAFR clrw cc_mcr(r2) ; set mode 0 and 24 bit mode (MCR) ashl #-3,r4,r4 ; F/8 => r4 casew r4,#0,#3 ; sort function code case_tx:.word cc_read -case_tx ; CAMAC read .word cc_cont -case_tx ; CAMAC control .word cc_write-case_tx ; CAMAC write .word cc_cont -case_tx ; CAMAC control brw ccfsa_err_invfunc ; error (invarid function code) ; ; Error detected ; ccfsa_err_invfunc: pushal cc_mes_invfunc ; invarid function code brw ccfsa_err_exit ; ccfsa_err_exit: calls #1,write ; pushal cc_mes_ccfsa ; error detected in ccfsa ret ; ; CAMAC read operation ; cc_read: bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done movzwl cc_dhr(r2),r3 ; high 8 bit ashl #16,r3,r3 ; Extract N + A addw cc_dlr(r2),r3 ; low 16 bit movl r3,@p3(ap) ; Store read data movzwl cc_ers(r2),@p4(ap) ; copy ers ret ; ; CAMAC write operation ; cc_write: movl @p3(ap),r3 ; write data ashl #-16,r3,r4 ; extract high 8 bit movw r4,cc_dhr(r2) ; high 8 bit movw r3,cc_dlr(r2) ; low 16 bit bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done movzwl cc_ers(r2),@p4(ap) ; copy ers ret ; ; CAMAC control operation ; cc_cont: bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done movzwl cc_ers(r2),@p4(ap) ; copy ers ret .sbttl CCNAF Perform Single CAMAC Action ; ; Perform single CAMAC Action ; ; ; Calling sequence ; ; called with calls or callg ; ; Input/Output parameters (all interger*4) ; ; p1 c (crate numner) ; p2 n (station number) ; p3 a (sub address) ; p4 f (function code) ; p5 int (CAMAC DATA word) ; p6 q (Q responce) ; ; ccnaf:: .word ^M ; movl cbase,r2 ; restore CAMAC csr address movw @p1(ap),cc_ccr(r2) ; load Crate address to CCR ashl #9,@p2(ap),r3 ; N station number ashl #5,@p3(ap),r4 ; A sub address addl r4,r3 ; N + A => R3 movl @p4(ap),r4 ; F => R4 addw3 r3,r4,cc_nafr(r2) ; load N + A + F to NAFR clrw cc_mcr(r2) ; set mode 0 and 24 bit mode (MCR) ashl #-3,r4,r4 ; F/8 => r4 casew r4,#0,#3 ; sort function code case_ty:.word cd_read -case_ty ; CAMAC read .word cd_cont -case_ty ; CAMAC control .word cd_write-case_ty ; CAMAC write .word cd_cont -case_ty ; CAMAC control brw ccfsa_err_invfunc ; error (invarid function code) ; ; CAMAC read operation ; cd_read: bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done movzwl cc_dhr(r2),r3 ; high 8 bit ashl #16,r3,r3 ; Extract N + A addw cc_dlr(r2),r3 ; low 16 bit movl r3,@p5(ap) ; Store read data movzwl cc_ers(r2),@p6(ap) ; copy ers ret ; ; CAMAC write operation ; cd_write: movl @p5(ap),r3 ; write data ashl #-16,r3,r4 ; extract high 8 bit movw r4,cc_dhr(r2) ; high 8 bit movw r3,cc_dlr(r2) ; low 16 bit bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done movzwl cc_ers(r2),@p6(ap) ; copy ers ret ; ; CAMAC control operation ; cd_cont: bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done movzwl cc_ers(r2),@p6(ap) ; copy ers ret .sbttl Dataway control subroutines ; ; CAMAC Datawau control subroutines ; ; CCCZ(ext) Generate Dataway Initialize ; CCCC(ext) Generate Crate Clear ; CCCI(ext,l) Set or Clear Dataway Inhibit ; CTCI(ext,l) Test Dataway Inhibit ; CCCD(ext,l) Enable or Disable crate Demmand ; CTCD(ext,l) Test Crate Demand Enabled ; ; Calling sequence ; ; called with calls or callg ; ; Input/Output parameters (all interger*4) ; ; ext (external address) ; l (logical variables [.true. or .false.]) ; cccz:: ; initailize .word ^M ; movl cbase,r2 ; load csa address movw @p1(ap),cc_ccr(r2) ; load C bisw #1,cc_dlr(r2) ; set bit 1 movw #!!,cc_nafr(r2) ; LOAD N A F brb cc_gowait ; set go and wait cccc:: ; clear .word ^M ; movl cbase,r2 ; load csa address movw @p1(ap),cc_ccr(r2) ; load C bisw #2,cc_dlr(r2) ; set bit 2 movw #!!,cc_nafr(r2) ; LOAD N A F brb cc_gowait ; set go and wait ccci:: ; set/clear dataway inhibit .word ^M ; movl cbase,r2 ; load csa address movw @p1(ap),cc_ccr(r2) ; load C tstl @p2(ap) ; test P2 beql 1$ ; .false. bisw #4,cc_dlr(r2) ; set bit 2 brb 2$ ; 1$: bicw #4,cc_dlr(r2) ; clear bit 2 2$: movw #!!,cc_nafr(r2) ; LOAD N A F brb cc_gowait ; set go and wait ctci:: ; test dataway inhibit .word ^M ; movl cbase,r2 ; load csa address movw @p1(ap),cc_ccr(r2) ; load C movw #!!,cc_nafr(r2) ; LOAD N A F bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done bitw #4,cc_dlr(r2) ; test inhibit bit beql 2$ ; is not set movl #-1,@p2(ap) ; set .true. 2$: brb 3$ ; clrl @p2(ap) ; set .false. 3$: ret cccd:: ctcd:: .word ^M ; cccd, ctcd is not varid ret cc_gowait: bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done ret .sbttl Lam handling subroutines ; ; CAMAC Datawau control subroutines ; ; CDLAM(lam,b,c,n,m,i)Declare LAM ; CCLM(lam,l) Enable or Disable lam ; CCLC(lam) Clear LAM -- this is dummy rou. ; CTLM(lam) Test LAM -- this is dummt rou. ; ; Calling sequence ; ; called with calls or callg ; ; Input/Output parameters (all interger*4) ; ; lam (LAM identifier) ; b (branch number) ; c (crate number) ; n (station number) ; m (LAM access specifier) --- this is not used ; int (integer array) --- this is not used ; l (logical variables [.true. or .false.]) ; ; ; Data structure of lam ; low 2 byte = Crate number (CCR format) ; high 2 byte = Station number ; cdlam:: ; Declar lam .word ^M ; cccd, ctcd is not varid movl @p3(ap),r2 ; crate number ashl #16,@p4(ap),r3 ; station number*16 addl3 r2,r3,@p1(ap) ; store ret cclm:: ; Enable or disable lam .word ^M ; cccd, ctcd is not varid movl cbase,r2 ; load csr movl @p1(ap),r3 ; lam identifier movw r3,cc_ccr(r2) ; store crate number ashl #-16,r3,r3 ; extruct station number subl #1,r3 ; N-1 => r3 movl #1,r4 ; 1 => r4 ashl r3,r4,r4 ; get station number bit (r4) ; ; read lam mask reg ; movw #!!,cc_nafr(r2) ; LOAD N(30) F(1) A(13) bisw #cc_go,cc_csr(r2) ; set go bit 1$: tstb cc_csr(r2) ; test done bit bgeq 1$ ; wait until done tstl @p2(ap) ; test .true. or .false. beql 2$ ; false bisw #cc_sie,cc_csr(r2) ; set service interupt inable bisw r4,cc_dlr(r2) ; set mask bit ashl #-16,r4,r4 ; high 8 bit bisw r4,cc_dhr(r2) ; set mask bit brb 3$ ; 2$: bicw r4,cc_dlr(r2) ; clear bit ashl #-16,r4,r4 ; high 8 bit bicw r4,cc_dhr(r2) ; set mask bit ; ; write lam mask reg ; 3$: movw #!!,cc_nafr(r2) ; LOAD N(30) F(17) A(13) bisw #cc_go,cc_csr(r2) ; set go bit 4$: tstb cc_csr(r2) ; test done bit bgeq 4$ ; wait until done ret cclc:: ; Enable or disable lam ctlm:: ; Enable or disable lam .word ^M ; cccd, ctcd is not varid ret .sbttl Data area for CAMAC driver ; ; Data area for CAMAC driver ; .psect iobase_va,noexe,gbl,page ; ; Dummy data area for phisical Q22-bus IO mapping ; iobase_va:: .blkb ^x400 ; ; Work data area for CAMAC dirver ; .psect CAMAC_Vari,noexe,gbl,quad iobase_ret:: .long 0 ;I/O page base addaress cbase:: .long 1 ; ; ; Error msage text ; cc_mes_invfunc: .asciz /C2922-E-invfunc Invarid CAMAC function code/ cc_mes_ccfsa: .asciz /C2922-E-ccfsa Error detected in subroutine CCFSA/ .end